Difference between revisions of "VIPCO LED display"

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(added pinout: THEREIFIXEDIT)
(added more information, linked datasheets locally and a first test-run video)
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|Members=Xopr, Da Syntax
 
|Members=Xopr, Da Syntax
 
}}
 
}}
[[File:VIPCO LED display.jpg|thumb|500px|VIPCO LED display, euro coin as size reference, complete with self-projection]]
 
Got a hold of two VIPCO displays (120x32 red pixels), which currently are not working yet.
 
  
== Specs ==
+
=== synopsis ===
* 120x32 red LEDs
+
[[File:VIPCO LED display.jpg|thumb|335px|VIPCO LED display, euro coin as size reference, complete with self-projection]]
* Driven by HD64180RP6 [http://datasheets.chipdb.org/Hitachi/64180/HD64180RZ.pdf datasheet]
+
Got a hold of two VIPCO displays (120x32 red pixels).
* Controlled by RS232 and probably RS485
+
{{#widget:YouTube|id=JSjKT0aKni4}}
* display works per 2-line driven by TIP107
 
  
Other ICs (vertical control)
+
=== used ICs ===
* ULN2003A (High-Voltage, High-Current Darlington Transistor Arrays [http://www.ti.com/lit/ds/symlink/uln2003a.pdf datasheet])
+
* Driven by HD64180RP6 CPU ([[Media:HD64180RZ.pdf|datasheet]])
* CD4514BE (CMOS 4-Bit Latch/4-16 Line Decoders [http://www.ti.com/lit/ds/symlink/cd4515b.pdf datasheet])
+
* ULN2003A (High-Voltage, High-Current Darlington Transistor Arrays, [[Media:ULN2003A.pdf|datasheet]]), both used as horizontal and vertical driver
 +
* CD4514BE (CMOS 4-Bit Latch/4-16 Line Decoder,s [[Media:CD4515B.pdf|datasheet]]), row select
 +
* HCF4094A (8-stage shift and store bus register with 3-stage outputs, [[Media:HCF4094A.pdf|datasheet]]), 6 per panel, 5 panels per display
  
Other ICs (horizontal control)
+
=== pinout and protocol ===
* ULN2003A
 
* HCF4094A (8-stage shift and store bus register with 3-stage outputs, [http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00000399.pdf datasheet])
 
 
 
== Pinout ===
 
 
While the PCB segments are designed to first shift in data for the top 16 leds (24 wide) and then the bottom 16, at least the display without serial connector is modified to use 2 bits per clock (top and bottom half).
 
While the PCB segments are designed to first shift in data for the top 16 leds (24 wide) and then the bottom 16, at least the display without serial connector is modified to use 2 bits per clock (top and bottom half).
 
<pre>
 
<pre>
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* A+B+C+D is row select
 
* A+B+C+D is row select
 
* inhibit is the row 'strobe'
 
* inhibit is the row 'strobe'
+
 
[[Category:Displays]][[Category:LEDs]]
+
=== notes ===
 +
* the main controller board uses a HD64180RP6 and is controlled by RS232 and probably RS485
 +
* 16 TIP107 (8A darlington) transistors drive the 32 lines per two lines (1 and 17, 2 and 18, etc..)
 +
* one TIP107 seems worn out/broken (number 16)
 +
* a couple of leds have worn out and might need replacement
 +
* strobe seems to be latch, inhibit seems to act as strobe
 +
* the transistors seem to be on a separable voltage rail (tested on 5V@1A and 7.5V@2.2A)
 +
* the shift register shifts from the right, but the pinout per HCF4094A is reversed per 8 columns (as seen in the video) like this:
 +
{| class="wikitable"
 +
|8||9||10||11||12||13||14||15||0||7||1||2||3||4||5||6||7
 +
|}
 +
 
 +
 
 +
=== plan ===
 +
Since we have three LED displays which all work differently (this one, the [[PAL0123]] and [[DE-DP14116]]), we might want to write a display base class and build on top of that.
 +
 
 +
=== todo ===
 +
I ([[User:Xopr|xopr]]) have cheated on the Arduino controller because you need a clock above 250kHz for the display to draw smoothly; the demo writes two bits every 128 cycles and the columns are reused every row, so you'll see bars pushed in. The noise generator shifts in between 0 and 2 columns (of 2 random bits)
 +
 
 +
[[Category:Displays]][[Category:LEDs]][[Category:Arduino]]

Revision as of 09:37, 8 September 2015

Project: VIPCO LED display
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Members Xopr, Da Syntax
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synopsis

VIPCO LED display, euro coin as size reference, complete with self-projection

Got a hold of two VIPCO displays (120x32 red pixels).

used ICs

  • Driven by HD64180RP6 CPU (datasheet)
  • ULN2003A (High-Voltage, High-Current Darlington Transistor Arrays, datasheet), both used as horizontal and vertical driver
  • CD4514BE (CMOS 4-Bit Latch/4-16 Line Decoder,s datasheet), row select
  • HCF4094A (8-stage shift and store bus register with 3-stage outputs, datasheet), 6 per panel, 5 panels per display

pinout and protocol

While the PCB segments are designed to first shift in data for the top 16 leds (24 wide) and then the bottom 16, at least the display without serial connector is modified to use 2 bits per clock (top and bottom half).

back side (top right)
----------+
    VCC oo|data2
    VCC oo|VCC
  clock oo|D
 strobe oo|C
  data1 oo|B
inhibit oo|A
    GND oo|GND
    GND oo|GND
          |

Where:

  • VCC is roughly 7.8v without load
  • data1 is top 16 LEDs shift register
  • data2 is bottom 16 LEDs shift register
  • A+B+C+D is row select
  • inhibit is the row 'strobe'

notes

  • the main controller board uses a HD64180RP6 and is controlled by RS232 and probably RS485
  • 16 TIP107 (8A darlington) transistors drive the 32 lines per two lines (1 and 17, 2 and 18, etc..)
  • one TIP107 seems worn out/broken (number 16)
  • a couple of leds have worn out and might need replacement
  • strobe seems to be latch, inhibit seems to act as strobe
  • the transistors seem to be on a separable voltage rail (tested on 5V@1A and 7.5V@2.2A)
  • the shift register shifts from the right, but the pinout per HCF4094A is reversed per 8 columns (as seen in the video) like this:
8 9 10 11 12 13 14 15 0 7 1 2 3 4 5 6 7


plan

Since we have three LED displays which all work differently (this one, the PAL0123 and DE-DP14116), we might want to write a display base class and build on top of that.

todo

I (xopr) have cheated on the Arduino controller because you need a clock above 250kHz for the display to draw smoothly; the demo writes two bits every 128 cycles and the columns are reused every row, so you'll see bars pushed in. The noise generator shifts in between 0 and 2 columns (of 2 random bits)